Job description:
 
1.    ICC2, Innvous for IO/IP planning, placement, bump &RDL.
2.    physical verification . Be familiar with package flow is better
3.    Knowledge about process, ESD protect principle to do fullchip ESD design.
4.    Perform power analysis with PTPX and IR/EM analysis with Redhawk or voltus.
5.    Develop Perl/TCL/Shell scripts for flow and procedure automation
6.    Work proactively with EDA engineers and tool suppliers to debug tool functionality and bugs
 
Education/License:
BS is basic, MS is preferred
 
Working Experience:
2-5 years in sign-off check includes power/signal integrity analysis (IR drop, EM, ESD), physical verification(DRC/LVS/ERC/Antenna) 
 
Professional Knowledge:
 
Strong Logic design and Semiconductor device physic background
 
Good English in both written and spoken