Functions: 
·           Develop micro-architecture based on specification and customer input. 
·           Develop implementation spec for sub-blocks. 
·           Verilog design, DFT and timing closure. 
·           Block level verification and FPGA prototyping.  
Requirements: 
·           Solid knowledge of semiconductor logic design and flow, familiar with Synthesis and Static Timing Analysis.  
·           Strong programming skills (C/C++/SystemC/Verilog). 
·           Familiar with UNIX environment Perl/ TCL/bash/csh. 

·           Strong analytical and problem solving capability. 
·           Good communication skills and presentation skills, easy to work with. 
·           Detail oriented, methodical. 
·           Able to read and interpret English specifications and documents accurately. 
·           BS, MS or Ph.D. degree in Computer Science or Electrical Engineering.