Synopsys

500-1000人

武汉市东湖开发区高新大道999号武汉未来科技城

Synopsys

Synopsys

Memory circuit design engineer Senior

20万 - 30万 武汉 | 3年以上 | 本科及以上 | 全职

职位福利:技能培训,年终奖金,五险一金

发布时间:2021-09-13 发布者:HR 投递简历

描述:

岗位职责:

Job Description and Requirements

Will be responsible for design and development of memory compilers. It requires the candidate to understand memory circuit design and key challenges at deep sub-micron nodes. The candidate will require working with the team in producing quality memory compilers, improving the current design, architecture and flows. Strong verbal and written communication skills are important.

Requirements:

- BSEE minimum, MSEE preferred
- At least 2+ years in custom circuit design experience
- Expertise in memory circuit design
- Exposure to variation aware circuit design and analysis techniques
- Exposure to high speed and low power memory design
- Exposure to memory compilers will be a huge plus
- Understanding of key design and layout challenges at smaller technology nodes
- Exposure to FINFET technology nodes will be a huge plus
- Ability to lead a team of engineers towards execution

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