Job Description：

Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron chips including block level / full chip floor planning, timing closure, place&route, physical verification etc. The individual is expected to be an expert in multiple aspects in PD areas and provide technically leadership to the engineering team. The individual is also expected to be accountable for project delivery.

Job Requirement:

1.  5+ years of experience in physical design, tapeout experience in 28nm or advanced process is a plus
2. Knowledgeable in all aspects of ASIC design flow
3.  Demonstrate strong leadership and work well with cross-functional teams
4.  Good listening, writing and speaking English
5.  Good communication skills
6. Familiar with Back-End (physical design) EDA tools
7. Familiar with Front-End tools and RTL is a plus
8. Good at scripts, like Python/Tcl